What Numbers Work With 16 Bit Registers

Associates - Registers

Processor operations more often than not involve processing information. This data can be stored in retentivity and accessed from thereon. However, reading data from and storing data into retentiveness slows down the processor, as it involves complicated processes of sending the information request across the command autobus and into the memory storage unit and getting the data through the same channel.

To speed upward the processor operations, the processor includes some internal memory storage locations, called registers.

The registers store information elements for processing without having to admission the retentivity. A limited number of registers are built into the processor scrap.

Processor Registers

At that place are ten 32-flake and half dozen 16-bit processor registers in IA-32 compages. The registers are grouped into three categories −

General registers,
Control registers, and
Segment registers.

The general registers are further divided into the following groups −

Information registers,
Pointer registers, and
Alphabetize registers.

Data Registers

Four 32-fleck data registers are used for arithmetic, logical, and other operations. These 32-bit registers tin can exist used in three ways −

As complete 32-flake data registers: EAX, EBX, ECX, EDX.
Lower halves of the 32-bit registers can be used equally four 16-bit data registers: AX, BX, CX and DX.
Lower and higher halves of the above-mentioned four 16-bit registers can be used every bit eight 8-bit data registers: AH, AL, BH, BL, CH, CL, DH, and DL.

Data Registers

Some of these data registers accept specific use in arithmetical operations.

AX is the primary accumulator; it is used in input/output and most arithmetic instructions. For instance, in multiplication operation, one operand is stored in EAX or AX or AL register according to the size of the operand.

BX is known as the base register, as it could be used in indexed addressing.

CX is known as the count register, equally the ECX, CX registers shop the loop count in iterative operations.

DX is known as the information annals. It is also used in input/output operations. It is too used with AX register forth with DX for multiply and divide operations involving big values.

Arrow Registers

The arrow registers are 32-bit EIP, ESP, and EBP registers and corresponding 16-flake right portions IP, SP, and BP. There are three categories of pointer registers −

Instruction Arrow (IP) − The 16-bit IP annals stores the offset address of the next instruction to be executed. IP in association with the CS annals (as CS:IP) gives the complete address of the current instruction in the code segment.
Stack Pointer (SP) − The 16-bit SP annals provides the kickoff value within the program stack. SP in clan with the SS register (SS:SP) refers to be current position of data or address within the program stack.
Base Arrow (BP) − The xvi-bit BP annals mainly helps in referencing the parameter variables passed to a subroutine. The address in SS register is combined with the offset in BP to get the location of the parameter. BP can too be combined with DI and SI as base annals for special addressing.

Pointer Registers

Alphabetize Registers

The 32-flake alphabetize registers, ESI and EDI, and their 16-bit rightmost portions. SI and DI, are used for indexed addressing and sometimes used in addition and subtraction. In that location are two sets of index pointers −

Source Alphabetize (SI) − It is used as source index for string operations.
Destination Index (DI) − It is used every bit destination index for string operations.

Index Registers

Command Registers

The 32-bit instruction arrow register and the 32-bit flags register combined are considered as the control registers.

Many instructions involve comparisons and mathematical calculations and change the status of the flags and another conditional instructions test the value of these condition flags to take the control flow to other location.

The common flag bits are:

Overflow Flag (OF) − Information technology indicates the overflow of a loftier-order fleck (leftmost bit) of data afterward a signed arithmetic operation.
Direction Flag (DF) − It determines left or right management for moving or comparison string data. When the DF value is 0, the string operation takes left-to-right direction and when the value is ready to one, the string operation takes correct-to-left direction.
Interrupt Flag (IF) − Information technology determines whether the external interrupts like keyboard entry, etc., are to be ignored or processed. It disables the external interrupt when the value is 0 and enables interrupts when set to i.
Trap Flag (TF) − It allows setting the operation of the processor in single-step way. The DEBUG program we used sets the trap flag, and so nosotros could stride through the execution one teaching at a time.
Sign Flag (SF) − It shows the sign of the result of an arithmetic operation. This flag is fix according to the sign of a data detail following the arithmetics operation. The sign is indicated past the high-order of leftmost chip. A positive outcome clears the value of SF to 0 and negative result sets it to ane.
Zilch Flag (ZF) − Information technology indicates the result of an arithmetic or comparison operation. A nonzero effect clears the zero flag to 0, and a zero result sets it to i.
Auxiliary Bear Flag (AF) − It contains the carry from scrap three to bit iv post-obit an arithmetic operation; used for specialized arithmetics. The AF is set when a ane-byte arithmetics operation causes a carry from bit 3 into bit 4.
Parity Flag (PF) − It indicates the total number of one-bits in the effect obtained from an arithmetic performance. An even number of 1-bits clears the parity flag to 0 and an odd number of ane-$.25 sets the parity flag to 1.
Carry Flag (CF) − It contains the bear of 0 or 1 from a high-order flake (leftmost) after an arithmetic performance. It also stores the contents of last chip of a shift or rotate operation.

The following table indicates the position of flag bits in the 16-bit Flags register:

Flag:					O	D	I	T	S	Z		A		P		C
Bit no:	fifteen	14	13	12	11	10	ix	8	7	half-dozen	v	4	3	2	ane	0

Segment Registers

Segments are specific areas defined in a plan for containing data, code and stack. There are three main segments −

Code Segment − It contains all the instructions to be executed. A 16-flake Code Segment register or CS register stores the starting address of the code segment.
Data Segment − It contains data, constants and work areas. A 16-flake Information Segment register or DS annals stores the starting address of the data segment.
Stack Segment − It contains information and render addresses of procedures or subroutines. It is implemented as a 'stack' information structure. The Stack Segment register or SS register stores the starting address of the stack.

Autonomously from the DS, CS and SS registers, there are other extra segment registers - ES (extra segment), FS and GS, which provide additional segments for storing information.

In assembly programming, a plan needs to access the retentivity locations. All memory locations within a segment are relative to the starting address of the segment. A segment begins in an address evenly divisible by xvi or hexadecimal 10. So, the rightmost hex digit in all such memory addresses is 0, which is non mostly stored in the segment registers.

The segment registers stores the starting addresses of a segment. To go the exact location of data or instruction inside a segment, an first value (or displacement) is required. To reference whatsoever memory location in a segment, the processor combines the segment address in the segment register with the offset value of the location.

Example

Look at the following elementary program to sympathise the use of registers in associates programming. This program displays 9 stars on the screen forth with a elementary message −

section	.text    global _start	 ;must be declared for linker (gcc) 	 _start:	         ;tell linker entry point    mov	edx,len  ;message length    mov	ecx,msg  ;message to write    mov	ebx,i    ;file descriptor (stdout)    mov	eax,four    ;system telephone call number (sys_write)    int	0x80     ;call kernel 	    mov	edx,9    ;message length    mov	ecx,s2   ;bulletin to write    mov	ebx,1    ;file descriptor (stdout)    mov	eax,4    ;organization call number (sys_write)    int	0x80     ;call kernel 	    mov	eax,one    ;system telephone call number (sys_exit)    int	0x80     ;call kernel 	 section	.data msg db 'Displaying 9 stars',0xa ;a message len equ $ - msg  ;length of message s2 times nine db '*'

When the above code is compiled and executed, information technology produces the following event −

Displaying 9 stars *********